After patterning the final metal layer, a passivation layer (or film) is deposited over the entire silicon wafer comprising many semiconductor devices. The passivation film serves to insulate and protect the device from contaminates, moisture and physical damage.
The passivation film preferably consists of two layers. A silicon nitride layer is the protective layer, but because silicon nitride is brittle, a preliminary coating of silicon oxide is formed on the wafer to cushion the transition of stresses to the subsequently deposited nitride. The thickness of the silicon oxide layer is usually of the order of about one-half to one-third the thickness of the silicon nitride layer.
The passivation film is coated with a final photo-resist layer, sometimes called the PAD mask, which defines a pattern corresponding to regions in the integrated circuit in which electrical contact to the finished circuit will be made.
The contacts on metallic structures, i.e., bonding pads, are large steps in the topography of the device. The bonding pads are preferably multi-layer devices, one layer of which comprises aluminum, or an aluminum alloy, such as Al/Cu for electrical contact. Bonding pads are typically about 100.times.100 .mu.m in size, generally located on the periphery of the circuit, and separated by a space of about 50-100 .mu. m. Wet etching can be used for such a large area but dry etching is preferred.
Since the passivation film is a bi-layer film, and the bonding pads are preferably multi-layer structures, one typically used multi-step masking and etching steps. However, in a more efficient single mask process, the bonding pads are opened by sequentially etching the silicon nitride layer, the silicon oxide layer and a top most layer of the bonding pad which is generally TiW. TiW is well-known for its use as a diffusion barrier.
A problem can develop in single mask etching of the bi-layer passivation film, if the etch rate of the photo-resist is equal to or greater than the etch rate of any layer in the passivation film. Defining the selectivity between process A and process B as [the rate of process A]/[the rate of process B], the art is concerned about selectivities between nitride to resist and oxide to resist which are less than two, and particularly concerned about selectivities closer to one.
The selectivity of nitride/resist and oxide/resist are in the range of 1.0-1.7 at 70.degree. C. dry-etching with SF.sub.6. Thus, in order to etch a 10,000 angstrom layer of nitride a 5,000 layer of oxide and a 750 layer of TiW, one would consume as much as 15,000 angstroms of resist. With 30 % overetch, the total resist loss may reach 2 microns. The typical thickness of the resist coating varies with the topography. Over-step features on the device such as bonding pads, the resist layer is typically less than 2 microns. Consequently, the etching process could remove all resist and substantial nitride at the exposed edges of step features on the device. In this connection, reference is made to S. Wolf, et at., "Silicon Processing for the VLSI Era", Vol. 1, pp. 423-440, published by the Lattice Press, Sunset Beach, Calif. (1986). The latter is hereafter referred to as Reference "1" and it is herein incorporated by reference in its entirety as if fully set forth herein in ipsis verbis.
The present invention has found that the selectivity of the dry-etching process depends on the etching conditions, and in particular, the selectivity depends on the gases used as the plasma gas.
It would be advantageous if those process features which cause the selectivity of the process to be simultaneously so close to unity for both the oxide/resist and the nitride/resist, could be found.
It is well-known that dry-etching technology may also be used on other oxide steps such as VIAS, CONTACTS and SPACERS by adjustment of process parameters. Reference "1" at p. 555, reports the same problem with etching the photo-resist due to the lack of selectivity of fluorine-containing gases. It also reports, however, that selectivity with respect to silicon oxide/resist can be obtained using fluorine deficient plasma. The reference suggests adjusting the oxide/resist etch rate by the addition of O.sub.2 or SF.sub.6 to the fluorocarbon feed gas, such as CHF3. Reference "1" at p. 549 also reports the addition of O.sub.2 to CF.sub.4 dramatically increases the etch rate of both silicon and silicon oxide. Reference "1" at p. 556 reports that the selectivity of a CF.sub.4 isotropic etching process for silicon nitride to silicon oxide is about 21-3, the more "favorable" selectivity is obtained with the use of NF.sub.3 plasmas, e.g., about 9-10. H. Kudoh, et al., J. Electrochem. Soc.,Vol. 133, page 1666, 1986, report the use of a plasma gas consisting of CHF.sub.3 and O.sub.2 to etch silicon oxide.
Dry etching procedures include reactive ion etching (RIE), reactive ion beam etching, electron beam etching, plasma etching, and the like. Common to such dry etching procedures is the use of a reaction chamber wherein the silicon wafer to be etched is placed in a wafer holder. In addition to holding the wafer, the wafer holder is also used to maintain a constant wafer temperature which, among other factors, is important to insure constant etch rates on the wafer.
Suitable wafer holders include electrodes, inert materials and other heat sources and heat sinks. In general, a stream of helium gas is committed to flow through the backside of the wafer holder (the surface of the holder opposite the wafer) to further insure a constant wafer temperature, a procedure which is referred to as "backside cooling". Typically, in backside cooling the flow of helium gas is set to maintain a pressure of about 10-14 torr on the backside of the wafer holder.
Reactors used for dry-etching are typically referred to as "hexodes" or "triodes", characteristic of the 6-electrode reaction chamber and the 3-electrode reaction chamber. Other parameters that impact the reactions occurring in a dry-etch reaction chamber include the surface temperature, the surface electrical potential, the nature of the surface, geometrical aspects of the surface (e.g., the angle of incidence of impinging ions controls whether they are striking the bottom, or the side wall of an etched feature), the plasma gases and their composition, the total pressure in the reaction chamber, the rate of addition of the reactant plasma gases, the power provided to the unit, the excitation frequency, the gas flow rate, geometrical reactor factors, the nature of the discharge gas, and, of course, the etching time. It has been found that a change in a single microscopic parameter typically alters two or more basic plasma parameters and possibly one or more of the surface parameters such as temperature or electrical potential. This makes process development in plasma systems a difficult challenge.
The present invention makes a contribution to the art of dry-etching bi-layer passivation films through the use of novel plasma etching methods.